Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Common uses for flash memory include personal computers, flash drives, digital cameras, and cellular telephones. Program code and system data such as a basic input/output system (BIOS) are typically stored in flash memory devices for use in personal computer systems.
Operation of memory cells in electronic devices includes applying electrical signals to their terminals so as to modify the threshold voltage of the memory transistors in a finely controlled way. Data storage is obtained associating logical values to different possible ranges of threshold voltage. FIG. 1 shows a plot of word line voltage VWL versus time of typical prior art programming and verification operations. The figure shows the series of incrementally increasing programming pulses 101 being applied to a control gate of a target memory cell as the word line voltage VWL. Each programming pulse 101 has a programming voltage Vpgm that is increased by a step voltage from the previous programming pulse. Each programming pulse increases a charge level on a charge trapping material (e.g., floating gate) of the target memory cell, thereby increasing the cell's threshold voltage Vt. After each programming pulse 101, a verify pulse 102 occurs at a verify voltage Vvfy to determine if the cell's threshold voltage has increased to the target level.
FIG. 2 shows the results of programming a number of memory cells using the programming/verify pulses of FIG. 1. The dotted line 200 represents a Vt distribution prior to programming (e.g., erased) and the solid line 201 represents a final distribution of programmed memory cells at their target level. FIG. 2 shows that the initial distribution is moved as the threshold voltages of the memory cells are increased by the programming pulses.
Typical non-volatile memory cells can be programmed as single level memory cells (SLC), such as illustrated in FIG. 2, or multiple level memory cells (MLC). SLC memory cells store a single bit of information and are programmed from the erased state (e.g., logical 1) to a single programmed state (e.g., logical 0). MLC memory cells store two or more bits of information and are programmed from the erased state (e.g., logical 11) to one of multiple different programmed states (e.g., logical 01, 00, 10), wherein the erased state and programmed states are hereinafter collectively referred to as “data” states.
FIG. 3 shows a typical prior art diagram of Vt distributions of four possible states available for data storage in MLC memory cells of an array (e.g., logical 11, 01, 00, 10). This figure shows the number of cells in each programmed or erased state versus the memory cells' threshold voltage Vt.
FIG. 3 shows that the 11 data state 301 is the most negative state and is typically referred to as the erased state. The 10 data state 302 is the most positive state. The 01 data state 303 and the 00 data state 304 are located between the most negative and most positive states 301, 302. Different encodings of the threshold voltage distributions into data states are possible. The distributions of FIG. 3 are separated by margins 310, 311 between the states 303-304 and 304-302, respectively. Margins 310 and 311 and the margin between erased state 301 and the first programmed state 303 allow unambiguously assignment of a data state (e.g., a bit pattern) to each memory cell, based on its threshold voltage value.
A typical non-volatile memory device has only a limited threshold voltage range, referred to in the art as a window margin, in which the programmed data states have to fit. Thus, the greater the number of possible data states in a memory device, the tighter the Vt distributions have to be in order to remain within the window margin and still maintain margins between the states. In an SLC memory device, a Vt distribution enlargement does not typically affect the reading of a programmed memory cell. However, in an MLC memory device, enlarged Vt distributions might overlap and result in errors in reading the different data states.
For the reasons stated above, and for other reasons stated below that will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art to tighten threshold voltage distributions in a memory device.